Resume

• 1997

  Russian

  English

  City College of the City University of New

  Master of Engineering

  Electrical Engineering

  BS

  City University of New York City College

  ME

  Electrical Engineering

• 355

  A circuit exhibiting rectification and amplification characteristics. In particular

  a full-wave rectifier

  wherein the rectifier has the ability to simultaneously amplify and rectify an input voltage. The circuit comprises transconductor circuit

  rectifying circuit and amplifying circuit. The transconductor circuit is adapted for receiving an input voltage from at least one voltage source. The input voltage is then converted into intermediate currents by the transconductor circuit. Thereafter

  the rectifying circuit rectifies the intermediate currents current to produce a rectified current. Lastly

  the amplification circuit amplifies the input voltage to produce the amplified voltage.

  us

  Multistage amplification and high dynamic range rectification circuit

• 320

  A broadband amplifier in which an amplifier output stage is part of a stepped attenuator where the amplifier output stage can be selectively replaced by

  or bypassed by

  an attenuator block to produce one step of the stepped attenuator.

  us

  Programmable broad bandwidth gain amplifier

• Network Analyzer

  RF

  LNA

  Digital Design

  Integrated Circuit Design

  Spectre

  Circuit Design

  Verilog-A

  Mixed Signal

  Agilent ADS

  Analog

  Matlab

  PLL

  CMOS

  Characterization

  Verilog

  Analog Design

  Spectrum Analyzer

  C

  IC

  Pinkhasov

  Anadigics

  Data Device Corporation

  City College of the City University

  Data Device Corporation

  Adjunct Lecturer

  Conducted lectures for 2nd and 4th year courses in Electronics. \nPrepared and graded home works and exams.

  City College of the City University

  Engineering Assistant

  Modeled semiconductor devices using Advanced Design System and Mathcad.\nCharacterized performance of different electronic circuits using the following equipment: Network Analyzer

  Spectrum Analyzer

  Phase-Noise Analyzer and Noise-Figure Meter.\nBuilt test fixtures

  assembled packages

  \n\nStep to Health

  Anadigics

  Microwave Engineer

  Device Modeling\n * Developed models for semiconductor devices for GaAs and CMOS processes. The devices included active devices (HBTs

  MESFETs

  MOSFET) as well as passive components (Capacitors

  Inductors etc.) \n * Developed extraction routines for the following models: Agilent HBT

  VBIC

  Gummel-Poon

  BSIM

  EEFET3

  STATZ.\n * Developed custom models using Veriloga language for some special cases where the "industry standard" models would not perform adequately. \nDevice Characterization and Test Development\n * Generated software to perform on wafer tests to monitor the process. Prepared documentation for the developed measurement setups and software; trained test personal to use the setups and documentation. \n * Developed automated measurement setups to characterize performance of Power Amplifiers for CDMA and GSM applications. Tests included the power and ruggedness performance under different load conditions (Load/Source Pull). \n * Developed Phase Noise measurements setups to characterize the performance of VCO.\nCreated/modified drivers using C and Visual Basic to control different measurement equipment.

  Anadigics

  RFIC Design Engineer

  Design circuits for DOCSIS3.0 and DOCSIS3.1 cable modem applications in CMOS and GaAs processes.

  Anadigics

  Analog ASIC Design Engineer

  Data Device Corporation

  Mixed Signal Design Engineer

  System Analysis and Design\n * Generated system level model of an Integer-N PLL. Modeled PLL blocks using Verilog-A language. Used above model to predict phase noise

  spur and lock speed performance of the PLL.\nAnalog Design\nDesigned the following PLL blocks\n * Phase Detector and programmable current charge pump with matched UP and DOWN current (IBM 0.18 CMOS process

  TSMC 0.35 CMOS process). \n * Frequency divider consisting 4-GHz Dual Modules Prescaler

  Program Counter and Swallow Counter (IBM 0.18 CMOS process). \n * Designed a low distortion CMOS IF VGA with linear in DB control and total control range of over 50 dB (IBM 0.18 CMOS process). \n * Designed voltage control attenuator (linear in DB) and a stepped attenuator with a bandwidth over 1 GHz to be used in Automatic Gain Control Loop. (IBM 0.18 CMOS process) \n * Designed a signal strength indicator to detect signals in order of mV (IBM 0.18 CMOS process).\n * Designed \"Power On Reset\" circuit.\nDigital Design\n * Developed a \"Coarse Lock\" algorithm to control a bank of oscillators. The algorithm chooses an oscillator from a bank of oscilators that can generate the appropriate frequency. Written a synthesizable Verilog code for the above algorithm.\n * Developed a \"Lock Detect\" algorithm to indicate that the Phase Locked Loop is in locked condition. Written a synthesizable Verilog code for the above algorithm.

  Anadigics